DocumentCode
2146655
Title
CMOS-compatible zero-mask One Time Programmable (OTP) memory design
Author
Chan, Wan Tim ; Ng, K.P. ; Lee, M.C. ; Kwong, K.C. ; Li, Lin ; Ng, Ricky M Y ; Man, Tsz Yin ; Chan, Mansun
Author_Institution
Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong, China
fYear
2008
fDate
20-23 Oct. 2008
Firstpage
861
Lastpage
864
Abstract
A method to design CMOS-compatible diode-based One-Time Programmable (OTP) memory is discussed in this paper. In particular the program disturb problem is resolved by using diode drivers with sufficiently high breakdown voltage. The choices of memory elements and various available diodes in a standard CMOS process are carefully studied to obtain an optimal combination. Different memory cells were fabricated in standard 0.18-¿m CMOS technology to verify the functionality of the design.
Keywords
CMOS memory circuits; CMOS-compatible zero-mask one time programmable memory design; breakdown voltage; CMOS technology; Circuits; Continuous wavelet transforms; Design engineering; Design methodology; Dielectric breakdown; Diodes; Resistors; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4244-2185-5
Electronic_ISBN
978-1-4244-2186-2
Type
conf
DOI
10.1109/ICSICT.2008.4734679
Filename
4734679
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