DocumentCode
2146765
Title
A novel circuit scheme and analysis for three-level feram
Author
Wu, Hao ; Jia, Ze ; Ren, Tian-Ling
Author_Institution
Tsinghua Nat. Lab. for Inf. Sci. & Technol., Tsinghua Univ., Beijing, China
fYear
2008
fDate
20-23 Oct. 2008
Firstpage
880
Lastpage
883
Abstract
This paper proposes a novel circuit architecture and its operation style for three-level ferroelectric random access memory (FeRAM) which can improve storage density by 1.5 times compared to traditional ITIC FeRAM under same technology. A new reference voltage generation scheme is adopted to enhance the reliability of this proposed circuit architecture. Based on the results of simulation, the function and reliability of three-level FeRAM have been analyzed and verified.
Keywords
ferroelectric storage; integrated circuit reliability; random-access storage; FeRAM reliability; circuit analysis; circuit architecture; circuit scheme; ferroelectric random access memory; reference voltage generation scheme; storage density; three-level FeRAM; Capacitors; Circuit analysis; Encoding; Ferroelectric films; Ferroelectric materials; Information analysis; Nonvolatile memory; Polarization; Random access memory; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4244-2185-5
Electronic_ISBN
978-1-4244-2186-2
Type
conf
DOI
10.1109/ICSICT.2008.4734684
Filename
4734684
Link To Document