DocumentCode
2147151
Title
Biconditional BDD: A novel canonical BDD for logic synthesis targeting XOR-rich circuits
Author
Amaru, Luca ; Gaillardon, Pierre-Emmanuel ; De Micheli, Giovanni
Author_Institution
Integrated Systems Laboratory (LSI), EPFL, Switzerland
fYear
2013
fDate
18-22 March 2013
Firstpage
1014
Lastpage
1017
Abstract
We present a novel class of decision diagrams, called Biconditional Binary Decision Diagrams (BBDDs), that enable efficient logic synthesis for XOR-rich circuits. BBDDs are binary decision diagrams where the Shannon´s expansion is replaced by the biconditional expansion. Since the biconditional expansion is based on the XOR/XNOR operations, XOR-rich logic circuits are efficiently represented and manipulated with canonical Reduced and Ordered BBDDs (ROBBDDs). Experimental results show that ROBBDDs have 37% fewer nodes on average compared to traditional ROBDDs. To exploit this opportunity in logic synthesis for XOR-rich circuits, we developed a BBDD-based One-Pass Synthesis (OPS) methodology. The BBDD-based OPS is capable to harness the potential of novel XOR-efficient devices, such as ambipolar transistors. Experimental results show that our logic synthesis methodology reduces the number of ambipolar transistors by 49.7% on average with respect to state-of-art commercial logic synthesis tool. Considering CMOS technology, the BBBD-based OPS reduces the device count by 31.5% on average compared to commercial synthesis tool.
Keywords
Binary decision diagrams; Boolean functions; CMOS integrated circuits; CMOS technology; Logic gates; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013
Conference_Location
Grenoble, France
ISSN
1530-1591
Print_ISBN
978-1-4673-5071-6
Type
conf
DOI
10.7873/DATE.2013.211
Filename
6513657
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