• DocumentCode
    2147225
  • Title

    Gradual Ge1−xSix/Si heteronanocrystals based non-volatile floating gate memory device with asymmetric tunnel barriers

  • Author

    Lu, Jin ; Wang, Guangli ; Chen, Yubin ; Zuo, Zheng ; Shi, Yi ; Pu, Lin ; Zheng, Youdou

  • Author_Institution
    Dept. of Phys., Nanjing Univ., Nanjing, China
  • fYear
    2008
  • fDate
    20-23 Oct. 2008
  • Firstpage
    955
  • Lastpage
    957
  • Abstract
    The gradual Ge1-xSix/Si heteronanocrystals on ultra thin SiO2 were fabricated to form the metal-oxide-semiconductor (MOS) memory structure with asymmetric tunnel barriers through combining self-assembled growth and selective chemical etching technique. Charge storage characteristics in such memory structure have been investigated by using capacitance-voltage measurements. The observations demonstrate that the holes reach a longer retention time even with an ultra thin tunnel oxide, owing to the high band offset at the valence band between Ge and Si.
  • Keywords
    MOS memory circuits; elemental semiconductors; etching; germanium; nanostructured materials; random-access storage; self-assembly; silicon; silicon compounds; Ge1-xSix-Si; MOS memory structure; SiO2; asymmetric tunnel barriers; capacitance-voltage measurement; charge storage characteristics; heteronanocrystals; metal-oxide-semiconductor; nonvolatile floating gate memory device; selective chemical etching technique; self-assembled growth; ultrathin tunnel oxide; Amorphous materials; Capacitance measurement; Capacitance-voltage characteristics; Electrons; Etching; Hysteresis; Nonvolatile memory; Semiconductor films; Substrates; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    978-1-4244-2185-5
  • Electronic_ISBN
    978-1-4244-2186-2
  • Type

    conf

  • DOI
    10.1109/ICSICT.2008.4734701
  • Filename
    4734701