Title :
Boosting InAs TFET on-current above 1 mA/μm with no leakage penalty
Author :
Beneventi, Giovanni Betti ; Gnani, Elena ; Gnudi, A. ; Reggiani, S. ; Baccarani, G.
Author_Institution :
DEI, Univ. of Bologna, Bologna, Italy
Abstract :
In this work, an InAs Tunnel Field-Effect-Transistor (TFET) is carefully optimized by TCAD simulations. The device is able to provide on-state currents in the mA/μm range at a reduced supply voltage of 0.5 V, while keeping the off-state currents below the ITRS specs for HP and LOP devices. Next, the designed TFET is benchmarked with respect to the ITRS specs for advanced multi-gate transistors projected to year 2020.
Keywords :
III-V semiconductors; field effect transistors; indium compounds; technology CAD (electronics); tunnel transistors; HP devices; ITRS specs; InAs; InAs TFET; LOP devices; TCAD simulations; multigate transistors; no leakage penalty; off-state currents; on-state currents; tunnel field-effect-transistor; voltage 0.5 V; Doping; IP networks; Junctions; Logic gates; Mathematical model; Numerical models; Tunneling;
Conference_Titel :
Solid-State Device Research Conference (ESSDERC), 2013 Proceedings of the European
Conference_Location :
Bucharest
DOI :
10.1109/ESSDERC.2013.6818822
