DocumentCode
2148534
Title
A new process for self-aligned silicon-on-insulator with block oxide and its memory application for 1T-DRAM
Author
Tseng, Yi-Ming ; Lin, Jyi-Tsong ; Eng, Yi-Chuen ; Kang, Shiang-Shi ; Tseng, Hung-Jen ; Tsai, Ying-Chieh ; Jheng, Bao-Tang ; Lin, Po-Hsieh
Author_Institution
Dept. of EE, Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
fYear
2008
fDate
20-23 Oct. 2008
Firstpage
1154
Lastpage
1157
Abstract
This paper proposes a new self-aligned process to form the silicon-on-insulator with block oxide. Based on the TCAD simulation, we have proved that the new process can get excellent short-channel effects immunity compared to the previous process [1]. Also, the new process can overcome the problem of the previous one, which can not be used on the thin BOX devices, so that the application of the block oxide can be applied extensively. In addition, we study how the height of the block oxide affects the devices performance in detail. Finally, we demonstrate a novel floating body cell using block oxide for 1T-DRAM application and its memory characteristics, large programming window and low leakage, are better than the conventional counterpart.
Keywords
CMOS logic circuits; DRAM chips; semiconductor device reliability; silicon-on-insulator; DRAM; block oxide; self-aligned silicon-on-insulator; CMOS technology; Energy consumption; Immune system; Leakage current; Semiconductor films; Silicon on insulator technology; Substrates; Sun; Thermal resistance; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4244-2185-5
Electronic_ISBN
978-1-4244-2186-2
Type
conf
DOI
10.1109/ICSICT.2008.4734754
Filename
4734754
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