DocumentCode
2148774
Title
ACE: A robust variability and aging sensor for high-k/metal gate SoC
Author
Min Chen ; Reddy, Veerababu ; Krishnan, Sridhar ; Ondrusek, Jay ; Yu Cao
Author_Institution
Texas Instrum. Dallas, Dallas, TX, USA
fYear
2013
fDate
16-20 Sept. 2013
Firstpage
182
Lastpage
185
Abstract
A novel on-chip variability and aging sensor has been designed for robust generation of a voltage guard band in high-K/metal gate technologies. It is the first single sensor solution that is capable of guard-banding for both NBTI and PBTI effects. It offers the SoC the capability to dynamically adjust the on-chip guard-band for joint power-reliability optimization.
Keywords
ageing; circuit optimisation; high-k dielectric thin films; integrated circuit reliability; low-power electronics; negative bias temperature instability; system-on-chip; ACE; NBTI effect; PBTI effect; aging compensation echo; aging sensor; high-K/ metal gate SoC; negative bias temperature instability; positive bias temperature instability; power-reliability optimization; system-on-chip; variability sensor; voltage guard band; Aging; Degradation; Logic gates; Robustness; Sensitivity; Stress; System-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research Conference (ESSDERC), 2013 Proceedings of the European
Conference_Location
Bucharest
Type
conf
DOI
10.1109/ESSDERC.2013.6818849
Filename
6818849
Link To Document