DocumentCode
2148968
Title
MUDRI: A fault-tolerant decoding algorithm
Author
Ivanis, Predrag ; Al Rasheed, Omran ; Vasic, Bane
Author_Institution
School of Electrical Engineering, University of Belgrade, Serbia
fYear
2015
fDate
8-12 June 2015
Firstpage
4291
Lastpage
4296
Abstract
We propose an improved version of probabilistic gradient descent bit flipping algorithm for decoding low density parity check codes, based on MUltiple Decoding attempts and Random re-Initializations (MUDRI). The proposed algorithm significantly increases the probability of correcting error patterns uncorrectable by the existing variants of bit-flipping algorithm. The performance of the algorithm implemented in noisy hardware is analyzed for various code types and codeword lengths, and shown to be superior compared to other hard decision algorithms. The MUDRI decoder is mostly insensitive to the failures in registers and logic gates and therefore represents a desirable solution for implementation in unreliable hardware.
Keywords
Algorithm design and analysis; Decoding; Fault tolerance; Hardware; Iterative decoding; Logic gates; Probabilistic logic;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications (ICC), 2015 IEEE International Conference on
Conference_Location
London, United Kingdom
Type
conf
DOI
10.1109/ICC.2015.7248997
Filename
7248997
Link To Document