DocumentCode :
2149326
Title :
Low-k breakdown improvement in 65nm dual-damascene Cu process
Author :
Wang, Qi ; Gan, Howard ; Zhao, Linlin ; Zheng, Kevin ; Bei, Emily ; Ning, Jay
Author_Institution :
Logic Technol. Dev., Semicond. Manuf. Int. Corp., Beijing, China
fYear :
2008
fDate :
20-23 Oct. 2008
Firstpage :
1324
Lastpage :
1327
Abstract :
Leakage and breakdown characteristics of low-k dielectrics are becoming increasingly important reliability issues for Cu interconnects as device dimensions are scaled. Especially, in 65 nm dual-damascene Cu process, low-k dielectric has difficulty in meeting a breakdown spec of 50 V on cumulative curve at 0.1% intersection. Both dual-damascene metal dimension process uniformity control and interface integrity between Cu and NDC cap layer (SiCN) control are highly important in the 65 nm low-k dielectric breakdown reliability.
Keywords :
copper; electric breakdown; low-k dielectric thin films; Cu; dual-damascene process; low-k breakdown improvement; low-k dielectrics; size 65 nm; Chemicals; Copper; Dielectric breakdown; Electric breakdown; Etching; Gallium nitride; Integrated circuit interconnections; Logic devices; Semiconductor device breakdown; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
Type :
conf
DOI :
10.1109/ICSICT.2008.4734786
Filename :
4734786
Link To Document :
بازگشت