DocumentCode :
2151499
Title :
Design of an active polyphase filter in GSM receiver with low-IF topologies
Author :
Song, Jia-You ; Liu, Xiao-ye ; Wang, Zhi-Gong
Author_Institution :
Sch. of Inf. Eng., Zhengzhou Univ., Zhengzhou, China
fYear :
2008
fDate :
20-23 Oct. 2008
Firstpage :
1673
Lastpage :
1676
Abstract :
This paper describes the design of a polyphase filter in GSM receiver with low-IF topologies, using the circuit scheme of active-RC with the performance of single chip integrated. Based on TSMC 0.18 ¿m CMOS process, the Spectre simulation results indicate that the filter is centered at 110 kHz with 200 kHz of bandwidth. It has a voltage gain of about 30 dB, an image rejection ratio of about 38 dB. The power consumption is 4.2 mW under a 3 V power supply.
Keywords :
CMOS integrated circuits; active filters; cellular radio; integrated circuit design; low-power electronics; GSM receiver; Spectre simulation; TSMC CMOS process; active polyphase filter design; active-RC circuit scheme; bandwidth 110 kHz; bandwidth 200 kHz; gain 30 dB; image rejection ratio; low-IF topologies; power 4.2 mW; power consumption; power supply; single chip integration; size 0.18 mum; voltage 3 V; Active filters; Band pass filters; Bandwidth; Circuit topology; Frequency; GSM; Information filtering; Information filters; Receivers; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
Type :
conf
DOI :
10.1109/ICSICT.2008.4734874
Filename :
4734874
Link To Document :
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