A CORDIC implementation of a digital artificial neuron

Author

Wedlake, Martine ; Kwok, Harry L.

Author_Institution

Dept. of Electr. & Comput. Eng., Victoria Univ., BC, Canada

Volume

2

fYear

1997

fDate

20-22 Aug 1997

Firstpage

798

Abstract

Digital implementations of neural networks are either very complex or very simple, often complicated by the difficulty in building the sigmoidal activation function; in fact, many implementations use hard limiters or saturated linear activation functions to avoid the issue. This paper presents the CORDIC implementation of a digital neuron, achieving a data rate of 0.988 million synaptic connections/second, suitable for multilayer perceptrons. The CORDIC hardware algorithm is well known for its ability to compute difficult transcendental functions. Furthermore, the same CORDIC hardware can be used to calculate the net value to reduce hardware complexity

Keywords

digital arithmetic; iterative methods; multilayer perceptrons; transfer functions; CORDIC; digital neuron; iterative algorithm; multilayer perceptrons; synaptic connections; Artificial neural networks; Attenuation; Design engineering; Feeds; Iterative algorithms; Multilayer perceptrons; Neural network hardware; Neural networks; Neurons; Vectors;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications, Computers and Signal Processing, 1997. 10 Years PACRIM 1987-1997 - Networking the Pacific Rim. 1997 IEEE Pacific Rim Conference on

Conference_Location

Victoria, BC

Print_ISBN

0-7803-3905-3

Type

conf

DOI

10.1109/PACRIM.1997.620380

Filename

620380