DocumentCode :
2152501
Title :
Optimal clock overlapping of four-phase Dickson charge pump for power efficiency improvement
Author :
Yu, Kai ; Zou, Xuecheng ; Yu, Guoyi ; Li, Sizhen
Author_Institution :
Dept. of Electron. Sci.&Technol., Huazhong Univ. of Sci.&Technol., Wuhan, China
fYear :
2008
fDate :
20-23 Oct. 2008
Firstpage :
1729
Lastpage :
1732
Abstract :
This paper presents a compact power efficiency model to be applied in the analysis and design of clock overlapping of four-phase Dickson charge pump. The hands in equations on the optimal clock overlapping are concluded. Based on 0.25 um CMOS technology, the proposed model is consistent with the simulation result. Both simulation and model validate the optimal clock overlapping range attains better power efficiency when compare conventional designs.
Keywords :
CMOS integrated circuits; charge pump circuits; CMOS technology; compact power efficiency model; four-phase Dickson charge pump; optimal clock overlapping; power efficiency improvement; Boosting; CMOS technology; Charge pumps; Circuit simulation; Clocks; Elevators; Equations; Semiconductor device modeling; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-2185-5
Electronic_ISBN :
978-1-4244-2186-2
Type :
conf
DOI :
10.1109/ICSICT.2008.4734914
Filename :
4734914
Link To Document :
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