• DocumentCode
    2152878
  • Title

    A unified, scalable dual-field Montgomery multiplier architecture for ECCs

  • Author

    Sun, Wanzhong ; Dai, Zibin ; Ren, Nianmin

  • Author_Institution
    Inst. of Electron. Technol., Inf. Eng. Univesity, Zhengzhou, China
  • fYear
    2008
  • fDate
    20-23 Oct. 2008
  • Firstpage
    1881
  • Lastpage
    1884
  • Abstract
    This paper proposes a unified, scalable dual-field Montgomery multiplier architecture which can operate in both prime GF(p) and binary extension fields GF(2n) for arbitrary prime numbers and irreducible polynomials. The Montgomery multiplier architecture has advantages in speed and flexibility for operator size compared with conventional architectures using long adders or long-bit × short-bit multipliers by introducing using a balanced r-bit×r-bit dual field multiplier. Finally, the hardware size of multipliers on GF(2n) for various r, are investigated. The Montgomery multiplier provides efficient execution of Montgomery multiplication in either field for different operand lengths, which suitable be applied to elliptic curve cryptographic (ECC) processors.
  • Keywords
    adders; microprocessor chips; multiplying circuits; public key cryptography; adders; balanced r-bitÃ\x97r-bit dual field multiplier; binary extension fields; elliptic curve cryptographic processors; long-bit Ã\x97 short-bit multipliers; scalable dual-field Montgomery multiplier architecture; Arithmetic; Computer architecture; Elliptic curve cryptography; Equations; Hardware; Polynomials; Propagation delay; Public key cryptography; Sun; System buses;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    978-1-4244-2185-5
  • Electronic_ISBN
    978-1-4244-2186-2
  • Type

    conf

  • DOI
    10.1109/ICSICT.2008.4734926
  • Filename
    4734926