Title :
High gain lateral bipolar transistor
Author :
Verdonckt-Vandebroek, S. ; Wong, S.S. ; Ko, P.K.
Author_Institution :
Sch. of Electr. Eng., Cornell Univ., Ithaca, NY, USA
Abstract :
The authors describe a submicron BiMOS process in which the lateral BJTs (bipolar junction transistors) are so similar to the MOSFETs that no extra process steps are needed. A lateral npn BJT with beta higher than 1000 has been demonstrated. A lateral pnp BJT with high cutoff frequency has been demonstrated, provided the parasitic capacitances are minimized. It is believed that this lateral BJT can be utilized in many applications because it is inherently available in any submicron CMOS process that has been properly designed. Similarly, in a submicron n-well BiCMOS process with vertical npn BJT, a lateral pnp BJT (with high beta ) can be made available without any additional processing if the p-MOSFET is properly designed.<>
Keywords :
BIMOS integrated circuits; bipolar transistors; integrated circuit technology; bipolar junction transistors; high cutoff frequency; high gain; lateral bipolar transistor; lateral npn BJT; parasitic capacitances; submicron BiMOS process; submicron CMOS process; submicron n-well BiCMOS process; Bipolar transistors; CMOS technology; Circuit noise; Design optimization; Fabrication; Implants; MOSFET circuits; Power dissipation; Silicon; Threshold voltage;
Conference_Titel :
Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/IEDM.1988.32842
