Characterization and modeling of the power delivery networks of memory chips

Author

Stievano, I.S. ; Maio, I.A. ; Rigazio, L. ; Canavero, F.G. ; Izzi, R. ; Girardi, A. ; Lessio, T. ; Conci, A. ; Cunha, T. ; Teixeira, H. ; Pedro, J.C.

Author_Institution

Politec. di Torino, Turin

fYear

2009

fDate

12-15 May 2009

Firstpage

1

Lastpage

4

Abstract

This paper focuses on the power delivery characterization of high-speed IC memories by means of on-chip measurements. A systematic analysis of the measurement setup, of the effects of chip biasing and of the use of the measured responses to develop models defined by simplified circuit equivalents is given. All the results collected in the paper are based on real measurements carried out on a commercial 90 nm flash memory.

Keywords

flash memories; monolithic integrated circuits; power integrated circuits; semiconductor storage; flash memory; high-speed IC memories; memory chips; on chip measurements; power delivery networks; Fixtures; Flash memory; High speed integrated circuits; Integrated circuit interconnections; Integrated circuit measurements; Integrated circuit modeling; Integrated circuit packaging; Power measurement; Power system modeling; Semiconductor device measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Propagation on Interconnects, 2009. SPI '09. IEEE Workshop on

Conference_Location

Strasbourg

Print_ISBN

978-1-4244-4490-8

Electronic_ISBN

978-1-4244-4489-2

Type

conf

DOI

10.1109/SPI.2009.5089835

Filename

5089835