DocumentCode
2153330
Title
Development of a conception methodology for power multi rectifier chips module
Author
Raël, S. ; Bailivet, D. ; Schaeffer, Ch
Author_Institution
Lab. d´´Electrotech. de Grenoble, CNRS, St. Martin d´´Heres, France
Volume
2
fYear
1995
fDate
8-12 Oct 1995
Firstpage
946
Abstract
Many industrial applications require a higher power to volume ratio. Manufacturers have achieved switch functions composed of semiconductor chips connected in parallel within power modules. Therefore, we have developed a 3D electrothermal simulation tool which solves the heat conduction equation in stationary condition, and the electrical linear system of the parallel connection which takes into account the thermal behaviour of each chip. Thus, we are able to study some electrical and thermal imbalances of the power multi-chips module, and to contribute to a safe and reliable concept. This paper deals with the case of rectifier modules
Keywords
circuit analysis computing; heat conduction; multichip modules; rectifying circuits; semiconductor device models; 3D electrothermal simulation tool; electrical imbalance; electrical linear system; heat conduction equation; junction temperature; parallel connection; power multi rectifier chips module; power to volume ratio; semiconductor chips; stationary condition; thermal imbalance; Electrothermal effects; Equations; Linear systems; Manufacturing industries; Multichip modules; Power semiconductor switches; Rectifiers; Resistance heating; Semiconductor device manufacture; Thermal conductivity;
fLanguage
English
Publisher
ieee
Conference_Titel
Industry Applications Conference, 1995. Thirtieth IAS Annual Meeting, IAS '95., Conference Record of the 1995 IEEE
Conference_Location
Orlando, FL
ISSN
0197-2618
Print_ISBN
0-7803-3008-0
Type
conf
DOI
10.1109/IAS.1995.530402
Filename
530402
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