Title :
A low power 170 MHz discrete-time analog FIR filter
Author :
Wang, Xiaodong ; Spencer, Richard R.
Author_Institution :
California Univ., Davis, CA, USA
Abstract :
A 170 MHz analog FIR filter operating from a single 3.3 V supply is described. The design has been fabricated in the HP 1.2 μm CMOS process and has an area of 2.35 mm by 1.97 mm including bonding pads. This 9-tap filter dissipates 70 mW when operating at 170 MHz. The multipliers are implemented using MDAC´s with 6-bit resolution
Keywords :
CMOS analogue integrated circuits; FIR filters; discrete time filters; 1.2 micron; 170 MHz; 3.3 V; 70 mW; CMOS process; MDAC; low power discrete-time analog FIR filter; multiplier; CMOS technology; Capacitance; Clocks; Computer architecture; Detectors; Equalizers; Finite impulse response filter; Magnetic memory; Maximum likelihood detection; Multiplexing;
Conference_Titel :
Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-3669-0
DOI :
10.1109/CICC.1997.606575
