Title :
Supply voltage drop study considering on-chip self inductance of a 32-bit processor´s power grid
Author :
Andersson, Daniel A. ; Nilsson, Björn ; Pihl, Johnny ; Svensson, Lars J. ; Larsson-Edefors, Per
Author_Institution :
Atmel Norway AS, Tiller
Abstract :
Conventional IR drop analysis suggests that on-chip inductive effects can be neglected when estimating supply voltage drops. We present a supply voltage drop analysis for a commercial 32-bit application processor. Our power grid model uses a backbone RL extracted netlist of the processor´s power grid, complemented with capacitances from the processor design and a current signature defined by the worst-case switching test vector, located in the power-up sequence of the processor. Our circuit simulations show that on-chip self inductance makes the actual supply voltage drop deviate by more than 55% and 25% from the ~6% and ~8% drop, respectively, of nominal supply voltage that a conventional IR power grid model yields.
Keywords :
integrated circuit modelling; microprocessor chips; power grids; on-chip self inductance; power-up sequence; processor power grid; supply voltage drop; switching test vector; word length 32 bit; Bonding; Capacitance; Estimation error; Inductance; Logic circuits; Network-on-a-chip; Power grids; Power systems; Voltage; Wire;
Conference_Titel :
Signal Propagation on Interconnects, 2009. SPI '09. IEEE Workshop on
Conference_Location :
Strasbourg
Print_ISBN :
978-1-4244-4490-8
Electronic_ISBN :
978-1-4244-4489-2
DOI :
10.1109/SPI.2009.5089853