DocumentCode
2154080
Title
A new modular VLSI filter architecture using computationally efficient recursive digital filter topology
Author
Järvilehto, Pekka ; Estola, Kari-Pekka
Author_Institution
Tech. Res. Centre of Finland, Tampere, Finland
fYear
1988
fDate
7-9 June 1988
Firstpage
1301
Abstract
The authors introduce a modular VLSI architecture for a novel linear-phase FIR (finite impulse response) filter structure. The proposed linear-phase FIR filters have a highly reduced number of general multiplications per sample compared to conventional FIR filters. The novel filter structure is based on an IIR subfilter whose infinite impulse response is truncated into a finite one. Although the subfilter has a nonlinear phase response, it can be made exactly linear by reversing the data stream in time and using the same filter again. Another possibility is to use a maximum-phase version of the FIR filter in cascade. The choice between different realizations depends on the filter specifications. In the general case the filter coefficients cannot be represented with the simple shift-and-add procedure and the time reversal technique should be used. The authors prefer the maximum-phase FIR alternative.<>
Keywords
VLSI; cascade networks; digital filters; digital integrated circuits; network topology; IIR subfilter; cascade; data stream reversal; filter coefficients; linear-phase FIR filters; maximum-phase version; modular VLSI filter architecture; nonlinear phase response; recursive digital filter topology; time reversal technique; Computer architecture; Coprocessors; Digital filters; Filtering; Finite impulse response filter; IIR filters; Nonlinear filters; Signal processing; Signal processing algorithms; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location
Espoo, Finland
Type
conf
DOI
10.1109/ISCAS.1988.15167
Filename
15167
Link To Document