DocumentCode
2154098
Title
Complementary bipolar processes on bonded SOI
Author
Feindt, S. ; Lapham, J. ; Steigerwals, J.
Author_Institution
Analog Devices Inc., Wilmington, MA, USA
fYear
1997
fDate
6-9 Oct 1997
Firstpage
4
Lastpage
6
Abstract
Bipolar transistors are well suited to analog circuits due to their exponential properties and their ability to drive capacitive loads. Analog Devices´ first complementary bipolar (CB) process used junction isolation. During the development phase of the second generation CB process it was decided that we employ bonded wafers with trenches to achieve full dielectric isolation. That process has been running in production since 1992 and has more than 100 products being built on it. Subsequent generations of CB processes at Analog have continued to use this isolation approach. In this paper we discuss the merits of using bonded SOI versus standard junction isolation for our processes. We describe the processes and their performance, as well as the challenges encountered in the development of the processes due to the incorporation of bonded wafer starting material
Keywords
bipolar analogue integrated circuits; isolation technology; silicon-on-insulator; wafer bonding; Analog Devices; Si; analog circuits; bonded SOI wafers; complementary bipolar processes; dielectric isolation; junction isolation; self heating; trenches; Capacitance; Capacitors; Dielectric substrates; Dielectric thin films; Implants; MOSFETs; Resistors; Transistors; Voltage; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 1997. Proceedings., 1997 IEEE International
Conference_Location
Fish Camp, CA
ISSN
1078-621X
Print_ISBN
0-7803-3938-X
Type
conf
DOI
10.1109/SOI.1997.634905
Filename
634905
Link To Document