An 8mW frequency detector for 10Gb/s half-rate CDR using clock phase selection

A half-rate single-loop CDR with a new frequency detection scheme is introduced. The proposed frequency detector selects between the clock phases (I and Q) to reduce cycle slipping, hence improving lock time and capture range. This frequency detector, implemented within a 10Gb/s CDR in Fujitsu 65nm CMOS, consumes only 8mW, but improves the capture range by up to 3.6×. The measured capture range with the FD is from 8.675Gb/s to 11Gb/s.