• DocumentCode
    2154495
  • Title

    Computing dominators and its applications on processor arrays with reconfigurable bus systems

  • Author

    Kao, Tzong-Wann ; Horng, Shi-Jinn

  • Author_Institution
    Dept. of Electron. Eng., Kuang Wu Inst. of Technol. & Commerce, Peito, Taiwan
  • fYear
    1996
  • fDate
    12-14 Jun 1996
  • Firstpage
    302
  • Lastpage
    308
  • Abstract
    Presents an efficient improvement of processor complexity while solving some connectivity problems in processor arrays with reconfigurable bus systems. We first derive two constant time algorithms in the proposed parallel processing system for computing the dominators and the dominator tree of an undirected graph either using a 9-D n×n×n processors or a 2-D n2×n2 processors, where n is the number of vertices of the graph. Then based on the dominator tree algorithm, we also solve many other graph connectivity problems in constant time. They are the articulation points, bridges, biconnected components, and bridge-connected components problems in undirected graphs
  • Keywords
    computational complexity; graph theory; parallel algorithms; parallel architectures; reconfigurable architectures; articulation points; biconnected components; bridge-connected components; bridges; dominator tree algorithm; graph connectivity problems; parallel processing; processor arrays; processor complexity; reconfigurable bus systems; undirected graphs; Bridges; Business; Computational modeling; Computer networks; Concurrent computing; Parallel algorithms; Parallel processing; Phase change random access memory; Processor scheduling; Tree graphs;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Architectures, Algorithms, and Networks, 1996. Proceedings., Second International Symposium on
  • Conference_Location
    Beijing
  • ISSN
    1087-4089
  • Print_ISBN
    0-8186-7460-1
  • Type

    conf

  • DOI
    10.1109/ISPAN.1996.508997
  • Filename
    508997