Title :
A CMOS data and clock recovery macrocell for burst-mode/continuous-mode transmissions
Author :
Yamaoka, Nobusuke ; Taya, Takashi ; Yoshida, Akira ; Kamio, Masao ; Yokoyama, Tomonobu
Author_Institution :
OKI Electr. Ind. Co. Ltd., Chiba, Japan
Abstract :
A data and clock recovery circuit, where a VCO is controlled by seven phase control signals, is implemented as a macrocell in 0.5 μm CMOS. The 1.5×2.1 mm2 macrocell can capture a burst-signal within three bits, can tolerate more than 500 bit runlength, can track phase-variation up to 2 π×690×103 rad/s, and dissipates 235 mW from a 3.3 V supply at 155.52 Mb/s. The macrocell can operate up to 320 Mb/s
Keywords :
CMOS integrated circuits; cellular arrays; clocks; logic CAD; logic arrays; mixed analogue-digital integrated circuits; voltage-controlled oscillators; 0.5 micron; 155.52 Mbit/s; 235 mW; 3.3 V; 320 Mbit/s; VCO; burst-mode/continuous-mode transmissions; clock recovery macrocell; data recovery circuit; gate array design; logic CAD; phase control signals; phase-variation tracking; Analog circuits; CMOS technology; Clocks; Delay; Logic arrays; Macrocell networks; Monitoring; Phase control; Synchronization; Timing;
Conference_Titel :
Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-3669-0
DOI :
10.1109/CICC.1997.606582
