Title :
Novel self-aligned gate process technology for i-AlGaAs/n-GaAs doped-channel hetero-MISFET(DMT) LSIs based on E/D logic gates
Author :
Hida, H. ; Tsukada, Y. ; Ogawa, Y. ; Toyoshima, H. ; Fujii, M. ; Shibahara, K. ; Kohno, M. ; Nozaki, T.
Author_Institution :
NEC Corp., Kawasaki, Japan
Abstract :
Novel concepts for enhancement (E) and depletion (D) -mode FET formation using an i-AlGaAs/n-GaAs doped-channel hetero-MISFET (DMT) and a novel self-aligned gate process technology for submicron-gate DMT LSIs based on E/D logic gates are described. The process technology uses low-damage AlGaAs/GaAs selective dry etching, thin-sidewall-assisted ion implantation, and Si-guard-ring-assisted rapid thermal annealing with slip-line generation and substrate warp suppressed. The 0.5- mu m-gate E-DMTs (D-DMTs) with LDD (lightly doped drain) structure show average V/sub t/ (threshold voltage) of 0.18 (-0.46) V, V/sub t/ standard deviation of 22.6 (24.9) mV, and maximum transconductance of 450
Keywords :
III-V semiconductors; aluminium compounds; annealing; field effect integrated circuits; gallium arsenide; insulated gate field effect transistors; integrated circuit technology; integrated logic circuits; large scale integration; oscillators; semiconductor junctions; semiconductor technology; sputter etching; -0.46 V; 0.18 V; 0.5 micron; 1.23 mW; 18 ps; 25 mW; 300 mS/mm; 450 mS/mm; 6 ps; AlGaAs-GaAs:Si; DCFL semiconductors; DMT; E/D logic gates; LDD; LSIs; RIE; doped-channel hetero-MISFET; forward turn-on voltage; lightly doped drain; power consumption; propagation delay; rapid thermal annealing; reactive ion etching; ring oscillators; selective dry etching; self-aligned gate process technology; slip line generator suppression; submicron-gate; substrate wrap suppression; thin-sidewall-assisted ion implantation; threshold voltage; transconductance; Dry etching; FETs; Gallium arsenide; Ion implantation; Logic gates; OFDM modulation; Rapid thermal annealing; Rapid thermal processing; Threshold voltage; Transconductance;
Conference_Titel :
Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/IEDM.1988.32906