Title :
DECOMP: a technology migration subsystem for full chip mask layouts
Author_Institution :
Inst. of Inf. Syst., Acad. of Sci., Novosibirsk
Abstract :
The paper presents DECOMP-an experimental subsystem for technology migration of full chip mask layouts which has been developed in cooperation between TIMA Laboratory (Grenoble, France) and the Institute of Informatics Systems of the Russian Academy of Sciences (Novosibirsk, Russia). This system is based on a compaction and rerouting strategy. It takes as input the full chip mask layout hierarchical description (CIF format) and produces as output the chip mask layout in the new design rules. The applicability of the compaction and rerouting facilities and the flexibility of the routing layers redistribution between different levels of the mask layout hierarchy are provided by a procedure for mask layout decomposition. The decomposition program takes as input any node of the mask layout hierarchical description and extracts the fragments which should be transformed by means of compaction. The size of the extracted fragments is controlled by parameters of decomposition. Each extracted fragment is processed by a symbolisation procedure which provides for resizing and regeneration of elementary objects such as transistors, contacts and wires. The target mask layout for each fragment is generated by a compaction program which is controlled by the constraints extracted during the symbolisation step. The resulting chip mask layout is generated by a routing program which is controlled by data structures (netlist and floorplan) extracted during the decomposition step
Keywords :
circuit layout CAD; masks; microprocessor chips; network routing; CIF format; DECOMP; compaction program; contacts; data structures; decomposition program; design rules; floorplan; full chip mask layouts; mask layout decomposition; mask layout hierarchical description; mask layout hierarchy; rerouting facilities; rerouting strategy; resizing; routing layer redistribution; routing program; symbolisation procedure; target mask layout; technology migration subsystem; transistors; wires; Compaction; Data mining; Design methodology; Informatics; Laboratories; Paper technology; Routing; Shape; Size control; Wires;
Conference_Titel :
Communications, Computers and Signal Processing, 1997. 10 Years PACRIM 1987-1997 - Networking the Pacific Rim. 1997 IEEE Pacific Rim Conference on
Conference_Location :
Victoria, BC
Print_ISBN :
0-7803-3905-3
DOI :
10.1109/PACRIM.1997.620415