DocumentCode
2155957
Title
A reconfigurable ΔΣ modulator with up to 100 MHz bandwidth using flash reference shuffling
Author
Caldwell, Thomas ; Alldred, David ; Zhao Li
Author_Institution
Analog Devices, Inc., Toronto, ON, Canada
fYear
2013
fDate
22-25 Sept. 2013
Firstpage
1
Lastpage
4
Abstract
A reconfigurable 65nm continuous-time low-pass ΔΣ modulator operates with a sampling frequency from 491 MHz to 1536 MHz, a signal bandwidth from 10MHz to 100 MHz, and a dynamic range of 75.4dB to 62.8 dB, respectively. Reference shuffling in the flash ADC is used to improve the linearity of the flash and DAC, while also increasing the highest sampling rate and bandwidth of the modulator.
Keywords
analogue-digital conversion; delta-sigma modulation; reference circuits; DAC; bandwidth 10 MHz to 100 MHz; continuous-time low-pass ΔΣ modulator; flash ADC; flash reference shuffling; frequency 491 MHz to 1536 MHz; reconfigurable ΔΣ modulator; size 65 nm; Ash; Bandwidth; Calibration; Clocks; Modulation; Noise; Receivers;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference (CICC), 2013 IEEE
Conference_Location
San Jose, CA
Type
conf
DOI
10.1109/CICC.2013.6658457
Filename
6658457
Link To Document