An alternative gate electrode material of fully depleted SOI CMOS for low power applications

Summary form only given. In this work, a variable gate work-function scheme was proposed, using a p⁺ polycrystalline SiGe/Si stack gate. The Ge composition is varied to achieve the desired threshold voltage while giving latitude in channel doping. Using this work-function engineering, a threshold voltage of 0.2 to 0.6 V can be easily obtained for sub-0.25 μm devices fabricated on ultra-thin film SOI. This technology can achieve near-symmetric threshold voltages for NMOS and PMOS devices with near-symmetric moderate channel doping concentration. This scalable gate work-function engineering can be an integral part of deep submicron SOI CMOS design and promises to achieve superior performance for low power electronics