Advancements in high-speed link modeling and simulation (An invited paper for CICC 2013)

As the high-speed I/O (HSIO) and serial link data rate keeps increasing, the requirements for accuracy and advanced capabilities of its modeling and simulation techniques get more stringent. Emerging requirements such as comprehending process, voltage, and temperature (PVT) variations at deep sub-micron process nodes or smaller, fully accounting for all the circuit blocks of the link, gap closing between modeling and measurements, have become critical and important, yet the conventional modeling and simulation methods cannot meet most or all of those requirements. In this paper, we will start with reviewing the status of techniques/methods used in recent HSIO simulation and modeling for signaling, integrated circuits (ICs), board circuits, such as behavioral statistical, SPICE and IBIS-AMI, outlining areas where they fall short, in comparison with those emerging requirements. We then will discuss the new methods and techniques that can meet and comprehend these emerging requirements and how they enhance and advance the accuracy and capability for the HSIO link modeling and simulation. We will give simulation and experimental results to demonstrate and quantify how to meet emerging requirements, as well as needed accuracy and capability advancements, with the new techniques.