Gate slow transients in GaAs MESFETs-causes, cures, and impact on circuits

Gate slow transient (or gate lag) in GaAs MESFETs were investigated and found to be responsible for pulse narrowing and loss of transmitted pulses in long inverter chains. Gate transients are caused by surface states near the edges of the gate. Gate transients can be drastically reduced in recessed gate MESFETs by controlling the gate trough geometry so that gates fit tightly in the bottom of the trough. Doping level and passivation also affect gate lag, although they are of less importance than trough geometry. Isolation technique and subchannel material structure do not strongly affect gate lag. Dispersion of FET output conductance is also found to be independent of gate lag.<>