Title :
The past present and future of design-technology co-optimization
Author :
Yeric, Greg ; Cline, Brian ; Sinha, S. ; Pietromonaco, David ; Chandra, Vishal ; Aitken, Robert
Author_Institution :
R&D, ARM, Austin, TX, USA
Abstract :
Design-Technology Co-Optimization (DTCO) has evolved from early Design-for-Manufacture (DFM) needs into a multi-faceted multi-lateral co-optimization below 20nm where multiple patterning and FinFETs add significant complexities. Effective DTCO now involves end product metrics applied to a myriad of design-technology choices. This paper will highlight past and present examples of DTCO in practice for low-power SoC design and examine a future of even more complexity that will drive a continued evolution in DTCO.
Keywords :
MOSFET; circuit optimisation; design for manufacture; integrated circuit design; low-power electronics; system-on-chip; DFM; DTCO; FinFET; design for manufacture; design-technology co-optimization; low-power SoC design; multifaceted multilateral co-optimization; multiple patterning; FinFETs; IP networks; Layout; Lithography; Logic gates; Metals; Standards;
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2013 IEEE
Conference_Location :
San Jose, CA
DOI :
10.1109/CICC.2013.6658476
