• DocumentCode
    2156632
  • Title

    A 1.5-ps Josephson OR gate

  • Author

    Kotani, S. ; Imamura, T. ; Hasuo, S.

  • Author_Institution
    Fujitsu Ltd., Morinosato-Wakamiya, Atsugi, Japan
  • fYear
    1988
  • fDate
    11-14 Dec. 1988
  • Firstpage
    884
  • Lastpage
    885
  • Abstract
    A high-speed performance of a Josephson MVTL (modified variable threshold logic) OR gate was demonstrated. This fast operation was achieved by miniaturizing the gate. An MVTL gate fabricated with Nb/AlO/sub x//Nb Josephson junctions, SiO/sub 2/ insulators and Mo resistors is shown. The Josephson critical current, I/sub c/, is proportional to the junction size, so when the size is reduced, the increased I/sub c/ spread is crucial in operating many junctions at the same bias current. The maximum-to-minimum spread in I/sub c/ for 100 gates connected in series was +or-6% of the mean. This small spread was achieved by reducing the thickness of the upper Nb electrode of the electron junction from 90 nm to 60 nm. The average current of I/sub c/ was 8800 A/cm/sup 2/, and the measured operating margin of a single gate was +or-32%. At the highest bias level, the average gate delay was 1.5 ps/gate.<>
  • Keywords
    Josephson effect; logic gates; superconducting junction devices; superconducting logic circuits; 1.5 ps; Josephson OR gate; Josephson junctions; MVTL; Mo resistors; Nb-AlO/sub x/-Nb; SiO/sub 2/ insulators; average gate delay; critical current; high-speed performance; modified variable threshold logic; superconducting logic circuits; Critical current; Current measurement; Delay; Electrodes; Electrons; Insulation; Josephson junctions; Logic gates; Niobium; Resistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1988. IEDM '88. Technical Digest., International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0163-1918
  • Type

    conf

  • DOI
    10.1109/IEDM.1988.32952
  • Filename
    32952