An all-digital time difference hold-and-replication circuit utilizing a dual pulse ring oscillator

This paper presents a time-domain analog signal hold-and-replication circuit which holds an input time interval of two signal transitions and replicates it any number of times. The proposed Time Difference Hold-and-Replication (TDHR) circuit utilizes a dual pulse ring oscillator to hold the input time interval without any time deterioration due to mismatches. The proposed TDHR circuit is implemented in a 65nm standard CMOS technology only with digital cells in the standard-cell library. It realizes 100ps to 1.2ns time interval hold and replication with the maximum error of ±50ps and consumes 0.51mW while occupying 40×60μm² area. This TDHR circuit is also used for an input time amplification and a TDC resolution enhancement application of the proposed TDHR is also demonstrated in this paper.