DocumentCode :
2157483
Title :
Virtual prototyping
Author :
Rowson, James A.
Author_Institution :
Alta Group, Sunnyvale, CA, USA
fYear :
1997
fDate :
5-8 May 1997
Firstpage :
89
Lastpage :
94
Abstract :
This paper presents a brief tutorial on verification at the system level. Verification is pulled apart into separate tasks, each task aimed at answering specific verification questions. Because no single verification technique can address all areas, a “stack” of verification approaches is postulated. The bulk of the paper is focused on two of the most abstract verification tasks, here termed Virtual Prototyping and Virtual Architecture
Keywords :
CAD; design engineering; formal verification; system level verification stack; virtual architecture; virtual prototyping; Algorithm design and analysis; Buildings; Computational modeling; Costs; Focusing; Mathematical model; Parallel processing; Protocols; Pulp manufacturing; Virtual prototyping;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-3669-0
Type :
conf
DOI :
10.1109/CICC.1997.606591
Filename :
606591
Link To Document :
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