DocumentCode :
2158310
Title :
Low complexity UWB circuit transceiver architecture for low cost sensor tag systems
Author :
Stoica, Lucian ; Tiuraniemi, S. ; Repo, Heikki ; Rabbachin, Alberto ; Oppermann, Ian
Author_Institution :
Centre for Wireless Commun., Oulu Univ., Finland
Volume :
1
fYear :
2004
fDate :
5-8 Sept. 2004
Firstpage :
196
Abstract :
The paper presents the architecture of a low power, low complexity ultra wideband (UWB) transceiver circuit. The circuit is designed for low data rate, low cost applications with built in location and tracking capabilities. The system is based on a non-coherent architecture which enables the receiver to be extremely simple and largely insensitive to the transmitted pulse shape. The circuit presented contains the oscillator, the transmitter, the receiver and the baseband digital signal processing (DSP) block. The oscillator contains the quartz oscillator, a delay locked-loop (DLL) and edge combiner for clock multiplication to generate a 528 MHz timing signal for pulse generation. The transmitter contains a second DLL to fix the delay of the UWB pulse, the UWB pulse generator and antenna. The transmitted UWB pulse is presented. The receiver contains low noise amplifier, variable gain amplifier, squaring circuits, integrators for energy collection, 4 bit analogue-to-digital converters (ADC), digital control logic, integrator and gain selection logic block and detection/bit decision block. The circuits are designed in a 0.35 μm Si-Ge BiCMOS process from Austria Microsystems.
Keywords :
BiCMOS integrated circuits; amplifiers; analogue-digital conversion; crystal oscillators; delay lock loops; delays; integrated circuit design; integrating circuits; logic circuits; pulse generators; radiofrequency oscillators; signal processing; transceivers; wideband amplifiers; 0.35 micron; 528 MHz; BiCMOS process; DLL; DSP block; UWB transceiver circuit; analogue-to-digital converters; antenna; bit decision block; clock multiplication; delay locked-loop; detection block; digital control logic; digital signal processing block; edge combiner; gain selection logic block; integrator; integrators; low noise amplifier; noncoherent architecture; pulse delay; pulse generator; quartz oscillator; receiver; sensor tag systems; squaring circuits; transmitter; ultra wideband transceiver circuit; variable gain amplifier; Circuits; Costs; Delay; Digital signal processing; Oscillators; Pulse amplifiers; Pulse generation; Sensor systems; Transceivers; Transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Personal, Indoor and Mobile Radio Communications, 2004. PIMRC 2004. 15th IEEE International Symposium on
Print_ISBN :
0-7803-8523-3
Type :
conf
DOI :
10.1109/PIMRC.2004.1370863
Filename :
1370863
Link To Document :
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