Title :
A 300 K-gate 0.5 μm CMOS implementation of an 8-VSB receiver IC [for HDTV]
Author :
Lee, Ilwan ; Kim, Dongkyu ; Lee, Seokjun ; Kwon, Kipaek ; Kim, Jongdae ; Kim, Incheol ; Kim, Yongho ; Park, Sungjun ; Kim, Cheongon ; Jung, Haemook ; Chang, Gyuhwan
Author_Institution :
D-TV Res. Center, Daewoo Electron. Corp., Seoul, South Korea
Abstract :
This paper presents an integrated 8-VSB receiver IC which demodulates and decodes the ATSC-compliant terrestrial RF transmission signal. The design has been accomplished in an ASIC-vendor independent way using only HDL description and synthesis tools. It can receive any IF signal of 5.38 MHz or 44 MHz. The chip has been implemented with equivalent 300 k gates comprising 200 k logic parts and 100 k gate-equivalent memory parts in an area of 8.0×7.7 mm2. The chip is operative at 50 MHz and consumes approximately 3.2 W under 5 volts in a commercial operating condition
Keywords :
CMOS integrated circuits; application specific integrated circuits; hardware description languages; high definition television; integrated circuit design; television receivers; 0.5 micron; 3.2 W; 44 MHz; 5 V; 5.38 MHz; 50 MHz; 8-VSB receiver IC; ATSC-compliant terrestrial RF transmission signal; CMOS; HDL description; HDTV; IF signal; gate-equivalent memory parts; synthesis tools; Adaptive equalizers; Automatic frequency control; CMOS integrated circuits; Clocks; Decoding; Delay lines; Finite impulse response filter; Hardware design languages; Radiofrequency integrated circuits; Timing;
Conference_Titel :
Custom Integrated Circuits Conference, 2000. CICC. Proceedings of the IEEE 2000
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5809-0
DOI :
10.1109/CICC.2000.852656
