Title :
Defining standard performance levels for power semiconductor devices
Author :
Budihardjo, I. ; Lauritzen, P.O. ; Wong, K.Y. ; Darling, R.B. ; Mantooth, H. Alan
Author_Institution :
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Abstract :
Model validation for power semiconductor devices is classified into five levels with model performance features and applications defined for each level. The five levels for each device correspond to: basic, accurate, thermal, failure and degradation models. Whenever they exist, examples of device models are identified for each power semiconductor device
Keywords :
power semiconductor devices; semiconductor device models; standards; accuracy; degradation models; failure models; model validation; power semiconductor devices; standard performance levels; thermal models; Circuit simulation; Circuit synthesis; NIST; Parameter extraction; Power semiconductor devices; Power semiconductor switches; SPICE; Semiconductor optical amplifiers; Thermal degradation; Thermal stresses;
Conference_Titel :
Industry Applications Conference, 1995. Thirtieth IAS Annual Meeting, IAS '95., Conference Record of the 1995 IEEE
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-3008-0
DOI :
10.1109/IAS.1995.530423
