DocumentCode
2159162
Title
AMS verification in advanced technologies
Author
Onodera, Hidetoshi ; Cao, Yu Kevin
Author_Institution
Kyoto University
fYear
2013
fDate
22-25 Sept. 2013
Firstpage
1
Lastpage
1
Abstract
Verification of Analog and Mixed-Signal(AMS) circuits and systems is increasingly challenging. This session explores novel AMS simulation and emulation techniques, and advanced reliability and performance issues with technology scaling.
Keywords
Adaptation models; Electrostatic discharges; Emulation; Integrated circuit modeling; Logic gates; Resistance; Solid modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference (CICC), 2013 IEEE
Conference_Location
San Jose, CA, USA
Type
conf
DOI
10.1109/CICC.2013.6658571
Filename
6658571
Link To Document