DocumentCode :
2159429
Title :
A MIMD based multiprocessor architecture for real-time image processing suitable for a monolithic redundant realization
Author :
Jeschke, Hartwig ; Wehberg, Thomas ; Volkers, Hans
Author_Institution :
Lab. fuer Informationstechnol., Hannover Univ., Germany
fYear :
1991
fDate :
29-31 Jan 1991
Firstpage :
40
Lastpage :
46
Abstract :
A novel MIMD (multiple instruction multiple data) based multiprocessor architecture consisting of multiple processing elements (PE) has been developed for real-time image processing. Each PE contains an arithmetic processing unit adapted to convolution-like low-level operations and a high-level and control processor. A high-speed random access to local image data is provided by two local input memories and an I/O and feedback unit. This architecture has a high regularity at the task level which is suitable for a WSI (wafer scale integration) implementation. The main parts of a PE have been realized as VLSI test chips providing a computational rate of up to 400 MOPS for one PE
Keywords :
VLSI; computerised picture processing; digital signal processing chips; parallel architectures; MIMD based multiprocessor architecture; VLSI test chips; WSI; arithmetic processing unit; convolution-like low-level operations; high-speed random access; local image data; monolithic redundant realization; multiple processing elements; real-time image processing; Arithmetic; Digital signal processing chips; Discrete cosine transforms; Image processing; Laboratories; Multiprocessing systems; Real time systems; Redundancy; System testing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wafer Scale Integration, 1991. Proceedings., [3rd] International Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-8186-9126-3
Type :
conf
DOI :
10.1109/ICWSI.1991.151694
Filename :
151694
Link To Document :
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