• DocumentCode
    2159637
  • Title

    Minimizing memory requirements in rate-optimal schedules

  • Author

    Govindarajan, R. ; Gao, G.R. ; Desai, P.

  • Author_Institution
    Dept. of Electr. Eng., McGill Univ., Montreal, Que., Canada
  • fYear
    1994
  • fDate
    22-24 Aug 1994
  • Firstpage
    75
  • Lastpage
    86
  • Abstract
    We address the problem of minimizing buffer storage requirement in constructing rate-optimal compile-time schedules for multi-rate dataflow graphs. We demonstrate that this problem, called the Minimum Buffer Rate-Optimal (MBRO) scheduling problem, con be formulated as a unified linear programming problem. A novel feature of the method is that it tries to minimize the memory requirement while simultaneously maximizing the computation rate. We have constructed an experimental testbed which implements our scheduling algorithm as well as: the widely used periodic admissible parallel schedules proposed by R.A. Lee and D.A. Messerschmitt (1987); the optimal scheduling buffer allocation (OSBA) algorithm of Q. Ning and G.R. Gao (1993); and the multi-rate software pipelining (MRSP) algorithm (R. Govinderajan and G.R. Gao, 1993). The experimental results have demonstrated a significant improvement in buffer requirements for the MBRO schedules compared to the schedules generated by the other three methods. Compared to block schedules, MBRO schedules perform better in terms of both computation rate and buffer requirements. The average observed improvement in buffer storage is 26% with respect to the MRSP algorithm, 17% with respect to block schedules and 5% with respect to the OSBA formulation
  • Keywords
    buffer storage; graph theory; linear programming; scheduling; signal processing; storage management; MBRO scheduling problem; Minimum Buffer Rate-Optimal; OSBA; block schedules; buffer storage requirement; experimental testbed; memory requirements; multi-rate dataflow graphs; multi-rate software pipelining; optimal scheduling buffer allocation; periodic admissible parallel schedules; rate-optimal compile-time schedules; rate-optimal schedules; unified linear programming problem; Buffer storage; Computer science; Digital signal processing; Dynamic scheduling; Linear programming; Optimal scheduling; Processor scheduling; Scheduling algorithm; Software algorithms; Software testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application Specific Array Processors, 1994. Proceedings. International Conference on
  • Conference_Location
    San Francisco, CA
  • ISSN
    1063-6862
  • Print_ISBN
    0-8186-6517-3
  • Type

    conf

  • DOI
    10.1109/ASAP.1994.331814
  • Filename
    331814