DocumentCode :
2159677
Title :
Concurrent error detection and fault location in reconfigurable WSI structures for FFT computation
Author :
Lombardi, F. ; Muzio, J.
Author_Institution :
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
fYear :
1991
fDate :
29-31 Jan 1991
Firstpage :
47
Lastpage :
53
Abstract :
Presents a novel approach for concurrent error detection and location in homogeneous VLSI/WSI (wafer scale integration) architectures for the computation of the complex N-point fast Fourier transform. The proposed approach is based on the relationship between the computations of cells at a given point distance. This relationship is analyzed with respect to functional and physical faults. Overhead issues for hardware and timing are addressed
Keywords :
VLSI; digital signal processing chips; fast Fourier transforms; FFT computation; complex N-point fast Fourier transform; error detection; fault location; homogeneous VLSI/WSI; physical faults; point distance; reconfigurable WSI structures; Circuit faults; Computer aided manufacturing; Computer architecture; Computer science; Concurrent computing; Fast Fourier transforms; Fault detection; Fault location; Hardware; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wafer Scale Integration, 1991. Proceedings., [3rd] International Conference on
Conference_Location :
San Francisco, CA
Print_ISBN :
0-8186-9126-3
Type :
conf
DOI :
10.1109/ICWSI.1991.151695
Filename :
151695
Link To Document :
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