DocumentCode
2159942
Title
A 1.5 GHz Fully-Monolithic CMOS LNA and Its Noise Behavior
Author
Mahmud, Arif ; El-Ghazaly, Samir
Author_Institution
Arizona State University, Tempe, AZ, USA. arif@asu.edu
fYear
2000
fDate
Oct. 2000
Firstpage
1
Lastpage
4
Abstract
A 1.8 V, 1.57542 GHz LNA has been designed for a 0.5-¿m CMOS process. This amplifier provides a forward gain of 19 dB with a low noise figure of only 2 dB while drawing 17 mW DC power. Unlike most of the circuits in literature, this design includes on-chip biasing and matching networks. A noise rejection study on a single-ended and a differential LNA designed in the proposed approach shows that the differential amplifier is more noisy for the same gain while being less sensitive to common-mode noise.
Keywords
Bonding; CMOS process; Circuit noise; Frequency; Impedance matching; Inductors; Low-noise amplifiers; Noise figure; Signal processing; Spirals;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference, 2000. 30th European
Conference_Location
Paris, France
Type
conf
DOI
10.1109/EUMA.2000.338633
Filename
4139959
Link To Document