DocumentCode
2159996
Title
FPGA synthesis using function decomposition
Author
Lai, Yung-Te ; Pan, Kuo-Rueih Ricky ; Pedram, Massoud
Author_Institution
Hitachi America Ltd., San Jose, CA, USA
fYear
1994
fDate
10-12 Oct 1994
Firstpage
30
Lastpage
35
Abstract
Presents two Boolean methods for identifying common subfunctions from multiple-output functions. The first method is based on encoding the distinct columns in the stacked decomposition chart of the multiple-output function; the second method is based on the examination and encoding of all possible subfunctions that can be generated from a function with respect to a given subset of input variables. We then apply these methods to the synthesis of lookup-table based field programmable gate arrays. Experimental results are very encouraging
Keywords
Boolean functions; encoding; logic arrays; logic design; table lookup; Boolean methods; FPGA synthesis; column encoding; common subfunctions identification; function decomposition; input variables; lookup-table based field programmable gate arrays; multiple-output functions; stacked decomposition chart; Boolean functions; Encoding; Field programmable gate arrays; Input variables; Logic devices; Logic functions; Minimization; Packaging; Partitioning algorithms; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1994. ICCD '94. Proceedings., IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-6565-3
Type
conf
DOI
10.1109/ICCD.1994.331848
Filename
331848
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