Title :
Dynamic list-scheduling with finite resources
Author :
Kamin, Ray A., III ; Adams, George B., III ; Dubey, Pradeep K.
Author_Institution :
Rockwell Int. Corp., Cedar Rapids, IA, USA
Abstract :
When the instruction level parallelism exceeds the available machine parallelism, a decision must be made as to which instructions get priority. This paper investigates the performance potential of five dynamic scheduling algorithms to prioritize instructions beyond basic blocks, thereby increasing processor utilization and performance. Trace-driven simulations for six benchmarks are used to analyze scheduling performance. A unique pipelining approach is introduced to address implementation limitations
Keywords :
parallel architectures; parallel programming; scheduling; dynamic scheduling; instruction level parallelism; instruction window; list scheduling; machine parallelism; scheduling; scheduling algorithms; superscalar; Aerospace electronics; Costs; Dynamic scheduling; Hardware; Heuristic algorithms; Optimal scheduling; Pipeline processing; Processor scheduling; Runtime; Scheduling algorithm;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1994. ICCD '94. Proceedings., IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-6565-3
DOI :
10.1109/ICCD.1994.331874
