DocumentCode :
2160575
Title :
Real-time DVB-S2 LDPC decoding on many-core GPU accelerators
Author :
Falcao, Gabriel ; Andrade, Joao ; Silva, Vitor ; Sousa, Leonel
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Coimbra, Coimbra, Portugal
fYear :
2011
fDate :
22-27 May 2011
Firstpage :
1685
Lastpage :
1688
Abstract :
It is well known that LDPC decoding is computationally demanding and one of the hardest signal operations to parallelize. Beyond data dependencies that restrict the decoding of a single word, it requires a large number of memory accesses. In this paper we propose parallel algorithms for performing in CPUs the most demanding case of irregular and long length LDPC codes adopted in the Digital Video Broadcasting Satellite 2 (DVB-S2) standard used in data communications. By performing simultaneous multicodeword decoding and adopting special data structures, experimental results show that throughputs superior to 90 Mbps can be achieved when LDPC decoders for the DVB-S2 are implemented in the current CPUs.
Keywords :
computer graphics; coprocessors; decoding; digital video broadcasting; direct broadcasting by satellite; parallel algorithms; parity check codes; telecommunication computing; GPU accelerator; bit rate 90 Mbit/s; data communication; digital video broadcasting satellite 2 standard; graphics processing unit accelerator; memory access; multicodeword decoding; parallel algorithm; real-time DVB-S2 LDPC decoding; Decoding; Digital video broadcasting; Graphics processing unit; Instruction sets; Kernel; Parity check codes; Throughput; CUDA; Communications; DVB-S2; GPU; LDPC;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech and Signal Processing (ICASSP), 2011 IEEE International Conference on
Conference_Location :
Prague
ISSN :
1520-6149
Print_ISBN :
978-1-4577-0538-0
Electronic_ISBN :
1520-6149
Type :
conf
DOI :
10.1109/ICASSP.2011.5946824
Filename :
5946824
Link To Document :
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