Title :
New frontiers of sub-100 nm VLSI technology-moving toward device and circuit co-design
Author_Institution :
Silicon Syst. Res. Labs., NEC Corp., Sagamihara, Japan
Abstract :
Scaling has been a basic principle for continuing progress in the development of VLSIs for a long time. However, this situation is changing when the design rule is approaching to 100 nm or less, and the SOC has become important. Instead of conventional scaling, integration of digital innovations in devices and circuits is now playing an important role. This paper analyzes the background of this change and defines new frontiers for device technology of sub-100 nm VLSIs.
Keywords :
VLSI; integrated circuit design; integrated circuit technology; 100 nm; VLSI technology; circuit design; device design; scaling; system-on-a-chip; Capacitance; MOSFET circuits; National electric code; Silicon; System-on-a-chip; Temperature dependence; Tunneling; Very large scale integration; Voltage; Wiring;
Conference_Titel :
VLSI Technology, 2000. Digest of Technical Papers. 2000 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-6305-1
DOI :
10.1109/VLSIT.2000.852746