Title :
A modular 0.13 /spl mu/m bulk CMOS technology for high performance and low power applications
Author :
Han, L.K. ; Biesemans, S. ; Heidenreich, J. ; Houlihan, K. ; Lin, C. ; McGahay, V. ; Schiml, T. ; Schmidt, A. ; Schroeder, U.P. ; Stetter, M. ; Wann, C. ; Warner, D. ; Mahnkopf, R. ; Chen, B.
Author_Institution :
Microelectron Div., IBM Corp., Hopewell Junction, NY, USA
Abstract :
A leading-edge 0.13 /spl mu/m generation CMOS technology is presented as a platform for systems on a chip (SOC) applications. A modular triple gate oxide process concept is introduced for the first time to allow the optimization of high performance devices, low leakage devices, and I/O devices independently. Process commonality is also achieved to support deep-trench based embedded DRAM. Seven levels of Cu interconnects integrated with low-k ILD have been developed. With mature KrF 248 nm lithography and optical enhancement techniques, aggressive design rules are achieved to meet the circuit density requirement. A 2.48 /spl mu/m/sup 2/ functional 6T-SRAM cell is demonstrated.
Keywords :
CMOS memory circuits; DRAM chips; SRAM chips; integrated circuit interconnections; integrated circuit technology; low-power electronics; 0.13 micron; 248 nm; 6T-SRAM cell; CMOS technology; Cu multilevel interconnect; KrF lithography; embedded DRAM; low power circuit; low-k interlevel dielectric; modular triple gate oxide; optical enhancement; system-on-a-chip; CMOS logic circuits; CMOS process; CMOS technology; Integrated circuit interconnections; Integrated circuit technology; Isolation technology; Lead compounds; Leakage current; Power generation; Standby generators;
Conference_Titel :
VLSI Technology, 2000. Digest of Technical Papers. 2000 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-6305-1
DOI :
10.1109/VLSIT.2000.852749
