Copper contamination induced degradation of MOSFET characteristics and reliability

Author

Inohara, M. ; Sakurai, H. ; Yamaguchi, T. ; Tomita, H. ; Iijima, T. ; Oyamatsu, H. ; Nakayama, T. ; Yoshimura, H. ; Toyoshima, Y.

Author_Institution

Microelectron Eng. Lab., Toshiba Corp., Yokohama, Japan

fYear

2000

fDate

13-15 June 2000

Firstpage

26

Lastpage

27

Abstract

MOSFET electrical characteristics and reliability impact with copper contamination is examined and some degradation modes are inspected. The mechanism of degradation is explained by increase of carrier trap sites in gate silicon oxide. The permissive contamination level of copper in device region is indicated by comparison between two different contamination level samples.

Keywords

CMOS integrated circuits; MOSFET; VLSI; chemical interdiffusion; copper; electromigration; hot carriers; integrated circuit interconnections; integrated circuit reliability; interface states; leakage currents; surface contamination; Cu; MOSFET; breakdown voltage; carrier trap sites; contamination induced degradation; copper contamination; damascene interconnection; degradation mechanism; degradation modes; electrical characteristics; gate silicon oxide; hot carriers; junction leak current; permissive contamination level; reliability; Atomic measurements; Capacitors; Contamination; Copper; Degradation; MOSFET circuits; Materials reliability; Pollution measurement; Silicon; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2000. Digest of Technical Papers. 2000 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-6305-1

Type

conf

DOI

10.1109/VLSIT.2000.852755

Filename

852755