DocumentCode
2160999
Title
A structural approach to state space decomposition for approximate reachability analysis
Author
Cho, Hyunwoo ; Hachtel, Gary D. ; Macii, Enrico ; Poncino, Massimo ; Somenzi, Fabio
Author_Institution
Motorola Inc., Austin, TX, USA
fYear
1994
fDate
10-12 Oct 1994
Firstpage
236
Lastpage
239
Abstract
Exploiting circuit structure is a key issue in the implementation of algorithms for state space decomposition when the target is approximate FSM traversal. Given the gate-level description of a sequential circuit, the information about its structure can be captured by evaluating the affinity between pairs or groups of latches. Two main factors have to be considered in carrying out the structural analysis of a sequential circuit: latch connectivity and latch correlation. We estimate the affinity of two latches by combining these two factors, and we use this measure to translate the state space decomposition problem into a graph partitioning problem. Traversal results obtained on the largest ISCAS´89 benchmarks show the effectiveness of the method
Keywords
directed graphs; finite automata; finite state machines; flip-flops; graph theory; performance evaluation; sequential circuits; FSM traversal; approximate reachability analysis; benchmarks; circuit structure; directed graph; finite state machines; gate-level description; graph partitioning problem; latch connectivity; latch correlation; sequential circuit; state space decomposition; state space decomposition problem; structural approach; Circuit analysis computing; Clustering algorithms; Latches; Logic; Optical computing; Partitioning algorithms; Reachability analysis; Sequential circuits; State estimation; State-space methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1994. ICCD '94. Proceedings., IEEE International Conference on
Conference_Location
Cambridge, MA
Print_ISBN
0-8186-6565-3
Type
conf
DOI
10.1109/ICCD.1994.331896
Filename
331896
Link To Document