Title :
SiGe heterojunctions in epitaxial vertical surrounding-gate MOSFETs
Author :
Date, C.K. ; Plummer, J.D.
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
Abstract :
Vertical MOSFETs are possible future architectures for memory cells as well as alternatives for conventional CMOS devices. The vertical channel allows growth of epitaxial structures, such as heterostructures, before the pillars are etched. We show how incorporation of SiGe heterostructures in vertical MOSFET devices can be used to delay the floating body effect or to modify hot carrier characteristics.
Keywords :
Ge-Si alloys; MOSFET; hot carriers; semiconductor epitaxial layers; semiconductor heterojunctions; semiconductor materials; SiGe; SiGe heterojunction; epitaxial vertical surrounding-gate MOSFET; floating body effect; hot carrier characteristics; memory cell; pillar etching; Breakdown voltage; Etching; Germanium silicon alloys; Heterojunctions; Hot carriers; Impact ionization; MOSFETs; Medical simulation; Photonic band gap; Silicon germanium;
Conference_Titel :
VLSI Technology, 2000. Digest of Technical Papers. 2000 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-6305-1
DOI :
10.1109/VLSIT.2000.852759
