Write buffer design for on-chip cache

Write strategy is an important part of cache design. The buffering scheme is frequently used to reduce the overhead associated with write operations. Although it is a common feature in cache design, there is no quantitative analysis on the effect of the write buffer. This study investigates the impact of the write buffer, particularly on a small on-chip cache. Five configurations, including write-through, write-through with unconditional-flush write buffer, write-through with conditional-flush write buffer, write-back and write-back with write buffer, are considered. Benchmark traces from both RISC and CISC machines are used to simulate the performance of different buffer configurations. Based on the simulation results, we provide a quantitative analysis on the write buffer, discuss the relative benefits of various features, and suggest a general design guideline for small on-chip cache